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MSP430 IC unlock and MCU crack series device contains CPU, program memory (ROM, ROM and Flash ROM), data memory (RAM), operation control, peripheral modules and oscillator and frequency multiplier and other major function module.
CPU by a 16 bit ALU, 16 register and a set of instructions, control logic composition. In the 16 register, the program counter PC, the stack pointer SP, status register SR and constant generator CGl, CG2 these four register have special purpose. In addition to R3 / CG2 and R2 / CGl outside, all register can be as a general purpose register for all the instructions operation. Constant generator is for instructions provide constant, not used to store data. To CGl, CG2 visit addressing mode can be the difference between a constant data. The CPU internal have a group of 16 bits of data bus and 16 address bus; CPU running orthogonal design, the module highly transparent reduced instruction set; PC, SR and SP with reduced instruction set of the realization of control, make the application development can realize complex addressing mode and software algorithm.
Memory MSP430 IC unlock and MCU crack series adopt "von - Newman structure". Support external extended memory is the goal of future performance enhancement. Special function register and peripheral module arranged in 000 h ~ 1 FFH area; RAM and ROM sharing 0200 h ~ FFFFH area, data memory (RAM) starting address is 0200 h
(1) program memory MSP430 IC unlock and MCU crack series program memory type have ROM, OTP and Flash ROM three. ROM capacity in 1 KB ~ sixty KB between; For Flash type of chip, internal also integrated two section 128 b (256 b) information storage and 1 KB store bootstrap program bootstrap memory (BOOT ROM); The code memory access is always to word form, obtains the code, and the data can be words or byte mode access. Every visit to need 16 data bus (MDB) and access to the current memory module the address bus (MAB); Memory module by module allows signal automatic selected. The lowest 64 KB space top 16 words, namely 0 FFFFH ~ 0 ffe0h, maintain storage reset and interrupt vector; In the program memory can also deposit form data, so as to realize the look-up table processing applications. Program to program memory can be read, but not written.
(2) data memory data memory (RAM) by two bus and CPU is linked together, namely the memory address bus MAB and memory data bus MDB. Data memory can word or byte integrated in on chip, its capacity in 128 b ~ 10 KB between; All the instructions to byte or word to operation. But to stack and PC operation is according to the word width, addressing must alignment I address.
Operation control MSP430 IC unlock and MCU crack series microcontroller operation is mainly controlled by stored in special register (SFR) of information. The different SFR who can allow interrupt to support depends on the interrupt mark state of software and define peripheral modules work mode. Ban peripheral modules, stop its function, can reduce current consumption, and all the data stored in the module register is still retained. Peripheral modules work mode can be used to indicate the specific location SFR.
Peripheral module peripheral modules including Basic Timer (Basic Timer), and a Timer (Timer_A and Timer_B), ADC converter, the I/O port, asynchronous and synchronous serial communication port (USART) and liquid crystal display driver module, etc. Peripheral module by MAB, MDB connected to the CPU. Wai module can be divided into words (16) module and a byte (eight) module two. For most peripheral modules, MAB is usually 16, MDB is 8 bit or 16 bit. A byte (eight bits) module data bus is eight, subject to bus switching circuit and 16 bit CPU connected. The module of data exchange without exception with byte order processing; To the word (16) module, the data bus is 16, without a conversion and directly with the CPU to 16 data bus. Module operation instruction without any restriction.
Oscillator and clock generator oscillator LFXT1 (LF) is dedicated to the general low power consumption 32768 Hz clock crystal oscillator design. In addition to crystal external outside, all the simulation components are integrated in on chip. But can also use a high-speed crystal oscillator work, at this moment need external load capacitance. For F13X, F14X, F15X and F16X and F4XX series, on chip and a high-speed access to the crystal oscillator XT2 oscillator. In addition to crystal oscillator, but F13X, F14X, F15X and F16X series has a digital control RC oscillator (DCO), using it to realize the oscillator digital control and frequency regulation; For F4XX series, crystal oscillator frequency with a frequency locking ring circuits (FLL or FLL +) frequency doubling. FLL or FLL + in electric in the lowest frequency began to work, and through the control of a numerical control oscillator (DCO) to adjust to the appropriate frequency. For the processor working clock generator frequency fixed in the crystal oscillator frequency doubling, and provide the clock signal MCLK. Peripheral module and CPU clock source selection is very agile. Can be used to make all kinds of low power consumption mode of operation:


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