Successful Case
Successful Case

STM32L100 Decode

2021-03-20

About unlock STM32L100xx, STM32L151xx, STM32L152xx, STM32L162xx
System reset;
The system resets all registers except RTC, RTC backup register, and control/status register RCC_CSR.
The system reset is generated by:

STM32L100 unlock
  1. NRST pin is pulled low
  2. End of watchdog count (WWDG reset)
  3. End of independent watchdog technology (IWDG reset)
  4. Software reset (SW reset)
  5. Low power management reset
  6. Option Byte Load Reset
  7. Exit Standby mode
    These reset sources can be acknowledged by looking at the corresponding reset flag bits in the RCC_CSR register.
    Software reset
    Reset by setting the SYSRESETREQ bit in the Application Interrupt and Reset Control register of the Cortex-M3. We need to refer to the Cortex-M3 kernel-related information.
    Low power management reset
    The following two scenarios result in a low power management reset:
  8. Enter Standby mode:
    This reset is enabled by resetting the nRST_STDBY bit in the User Option Byte. In this case, the device will enter the reset state instead of entering Standby mode when the sequence of entering Standby mode is executed at any time.
  9. Enter the Stop mode:
    This reset is enabled by resetting the nRST_STOP bit in the user option byte. In this case, the device will enter the reset state instead of entering the Stop mode when the sequence of entering the Stop mode is executed at any time.
STM32L100 unlock
  1. Option byte load reset
    The OBL_LAUNCH bit in the FLASH_PECR register generates an option byte to load the reset. This bit is used to load the option byte in software mode.
    Power Reset
    Generate a power reset:
STM32L100 decode
STM32L100 decode
  1. 1.Power-on/power-down reset (POR/PDR reset)
    2.BOR reset
    A power reset resets the values of all registers, including the records in the RTC field.
    The reset generated by these reset sources causes the NRST pin to remain low for the delay phase. The RESET service entry vector address is 0x0000_0004.
    The system reset signal is also output on the NRST pin. The pulse generator produces a minimum reset time of 20 us for each internal reset source. In an external reset, the reset pulse is generated with the NRST pin pulled low.
    RTC and backup register reset
    What can use the following two cases to reset the RTC peripheral, RTC clock source selection (in RCC_CSR) and the backup register:
  2. Set the reset caused by RTCRST in the RCC_CSR record.
  3. Power reset (BOR/POR/PDR)

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