Decryption of tms320f2xx series MCU
Decryption of tms320lf24xx series chip
IC crack of tms320f28xx series
Msp430fxx Series MCU crack
MSP430F series IC crack
The following provides the application of TI TMS320F, msp430 MCU unlock in PID, and PWM temperature control
1 System Composition
Pt100 use as a sensitive element in the system. The temperature conditioning chip AD7711 exerts an exciting current on it. The voltage difference between the two ends of Pt100 is input to AD7711. After filtering, amplification and A/D, it is serially sent to the TMS320F240. TMS320F240 reads temperature A/D code at a particular frequency under the control of the counter’s periodic interruption and obtains temperature data by digital filtering. The controller TMS320F240 receives the temperature control instruction and temperature data of the serial port, compares the real-time temperature collected with the heat required by the temperature control, and calculates the control quantity by PID. The control quantity is used to control the current direction and PWM output of the primary circuit. The current path determines whether to heat or refrigerate the temperature-controlled object. The outcome of PWM is decoupled by an optocoupler to drive power MOSFET to control the thermoelectric module’s heating or refrigeration power. The parameters of PID can also modify in real-time through the serial port.
1.1 Temperature Measuring Circuit
The temperature sensor is Pt100, the temperature conditioning chip is AD7711, the cut-off frequency set by the filter is 100 Hz, the programmable operational amplifier is 64 times, and the A/D conversion is 16 bits. The chip works in a serial mode under the control of the microprocessor. The frequency of AD7711 reading is 20 Hz—the sampling frequency control by the interruption of the T3 cycle of the processor timer. In the interruption processing, the PID processing function is invoked to calculate the control quantity.
1.2 Microprocessor Circuit
DSP has three universal timers, 12 PWM outputs, four acquisition units, an orthogonal coded pulse circuit, and the above chip peripherals have corresponding interrupt vector entry addresses.
The controller has a complete crystal oscillator and resets circuit, usually driven by a gate circuit by the reset mode of resistance and capacitance to ensure reliable reset. For power-on reset of DSP, pin RS (35) or PRESET (41) can use. They extended 16KRAM downloads programs during debugging. RAM chip selection should connect with PS (131) of external program chip selection and W/R and WE (1) of reading and write chip selection, respectively.
F240 Event Management (EVM) has three universal timers, which serve as the time benchmark for PWM operation. PWM7-9 is the output of three comparing units. In the design, T2 chooses as the time base. The counting mode is constant increment and subtraction counting, and T2 acts as a triangular wave generator. T3 timer controls the frequency of temperature sampling and PID calculation. Compared with the wave data of T2, the PID calculation results output PWM7/8/9 to control the three-way thermoelectric module.
DSP uses a piece of MAX232 to complete the level conversion, which connects with the PC serial port (three-wire mode). For DB9 serial port, 5 feet of public land connect directly, 3 feet and 2 feet cross for sending and receiving.
1.3 Main Circuit
When the circuit works, four MOSFETs of the main bridge arm control the thermoelectric module’s current direction to control whether the temperature control object is heated or refrigerated. After temperature PID calculation, the given three PWM output waves controlled by an optical coupler and MOS-FET driver to control the power intensity of each branch, and the relative relationship between the pulse widths of the three components adjust close to the temperature uniformity along the length direction of the temperature control object.
2.1 Use of DSP Interrupts
The interrupt vector table of TMS320F240 is located in 0000-003F; each interrupt takes up two words of space, so the interrupt entry address of interrupt number N is N*2. When the interruption occurs, the program will jump to the corresponding interruption entry address after corresponding environmental protection. At this interrupt address, write statements that jump to the interrupt processing function, such as “B_c_int3”. An interrupt vector table can be built separately to jump the assembly file, and the contents of the file can assemble into the VECs section with the instruction “. Sect VECs”, and the VECs section can be loaded into the address starting from 0000 of the program area (PAGE0) in the CMD file. When the interrupt occurs, the interrupt handler can be jumped to handle it. For interrupts to happen, it is necessary to open the shielding bit of the interrupt source. The shielding bit of shieldable hardware interrupts in F240 has three levels: one is INTM bit in ST0 to shield all shieldable hardware interrupts, the other is IMR at 0004 address in the data storage area to cover INT1-INT6, and three are in specific event control registers of on-chip and off-chip devices. For example, a serial port receiving PC data interrupt should occur:
2.2 PID Computational Output Control
The heating and refrigerating elements adopt the semiconductor thermoelectric module based on the Peltier principle. The module heated one end and refrigerates the other under a certain current. When the current revers, the hot and cold surfaces exchange. Due to the actuator’s nonlinearity, the effective output power changes sharply with the increase of temperature difference. Assuming that the external heat dissipation is good, that is to say, one end of the temperature difference is a constant temperature when the instrument operates at different temperature control points, different PID parameters considered, and several groups of different parameters adopted in the design. The output control quantity F is the sum of the control quantity calculated by each PID link: F = FP + fi + FD. – 1 < F < 1, [F] corresponds to the duty cycle of PWM. F < 0, the main circuit MOS3 and MOS4 turn on, current reverse; F > 0, the main circuit MOS1 and MOS2 turn on, current forward. The periodic interruption of timer three is set to 50 ms as the PID adjusting frequency.
Use of 2.3 PWM Circuit
After setting the counter, comparison value, and port level validity, start counter T2; when bar and comparison value are equal, port output level changes accordingly. The matching value SCM-PR1/2/3 regularly changes by PID calculation, and the corresponding PWM wave is output. After initialization of PWM with init-wm789 (), setpwm789 () can use for PWM.
2.4 Communication Format of DSP and PC
This design has a baud rate of 4800, a frame format of 8 data bits, and a stop bit—the protocol of starting bit, length, and sum check of each instruction design and given. In transmission, all instructions are 8 bytes long and two consecutive hexadecimal numbers 0xf
TMS320E15 [PLCC44] DIL44/PLCC44 ZIF
TMS320P15 [PLCC44] DIL44/PLCC44 ZIF
TMS320E17 [PLCC44] DIL44/PLCC44 ZIF
TMS320P17 [PLCC44] DIL44/PLCC44 ZIF
TMS27PC128 [PLCC32] DIL32/PLCC32 ZIF
TMS27C256 [PLCC32] DIL32/PLCC32 ZIF
TMS27PC256 [PLCC32] DIL32/PLCC32 ZIF
TMS27C510 [PLCC32] DIL32/PLCC32 ZIF
TMS27C512 [PLCC32] DIL32/PLCC32 ZIF
TMS27PC510 [PLCC32] DIL32/PLCC32 ZIF
TMS27PC512 [PLCC32] DIL32/PLCC32 ZIF
TMS27PC512 [TSOP32] DIL32/TSOP32 ZIF 18.4mm
TMS27PC512 [R-TSOP32] DIL32/TSOP32 ZIF 18.4mm
SMJ27C010 [PLCC32] DIL32/PLCC32 ZIF
TMS27C010 [PLCC32] DIL32/PLCC32 ZIF
TMS27PC010 [PLCC32] DIL32/PLCC32 ZIF
TMS27C010A [PLCC32] DIL32/PLCC32 ZIF
TMS27PC010A [PLCC32] DIL32/PLCC32 ZIF
TMS27PC010A [TSOP32] DIL32/TSOP32 ZIF 18.4mm
TMS27PC010A [R-TSOP32] DIL32/TSOP32 ZIF 18.4mm
TMS27LV010A [PLCC32] DIL32/PLCC32 ZIF
TMS27LV010A [TSOP32] DIL32/TSOP32 ZIF 18.4mm
TMS27LV010A [R-TSOP32] DIL32/TSOP32 ZIF MSP430F110 (ISP-BSL) Note: via ISP connector
MSP430F110 (ISP-JTAG) Note: via ISP connector
MSP430F1101 [SOWB20](BSL) DIL20/SOIC20 ZIF 300mil
MSP430F1101 [TSSOP20](BSL) DIL24/TSSOP24 ZIF 170mil
MSP430F1101 [SOWB20](JTAG) DIL20/SOIC20 ZIF 300mil
MSP430F1101 [TSSOP20](JTAG) DIL24/TSSOP24 ZIF 170mil
MSP430F1101 (ISP-BSL) Note: via ISP connector
MSP430F1101 (ISP-JTAG) Note: via ISP connector
MSP430F1101A [SOWB20](BSL) DIL20/SOIC20 ZIF 300mil
MSP430F1101A [TSSOP20](BSL) DIL24/TSSOP24 ZIF 170mil
MSP430F1101A [TVSOP20](BSL) DIL48/TVSOP48 ZIF-CS 170mil
MSP430F1101A [QFN24](BSL) DIL24/QFN24-1 ZIF-CS
MSP430F1101A [SOWB20](JTAG) DIL20/SOIC20 ZIF 300mil
MSP430F1101A [TSSOP20](JTAG) DIL24/TSSOP24 ZIF 170mil
MSP430F1101A [TVSOP20](JTAG) DIL48/TVSOP48 ZIF-CS 170mil
MSP430F1101A [QFN24](JTAG) DIL24/QFN24-1 ZIF-CS
MSP430F1101A (ISP-BSL) Note: via ISP connector
MSP430F1101A (ISP-JTAG) Note: via ISP connector
MSP430F1111A [SOWB20](BSL) DIL20/SOIC20 ZIF 300mil
MSP430F1111A [TSSOP20](BSL) DIL24/TSSOP24 ZIF 170mil
MSP430F1111A [TVSOP20](BSL) DIL48/TVSOP48 ZIF-CS 170mil
MSP430F1111A [QFN24](BSL) DIL24/QFN24-1 ZIF-CS
MSP430F1111A [SOWB20](JTAG) DIL20/SOIC20 ZIF 300mil
MSP430F1111A [TSSOP20](JTAG) DIL24/TSSOP24 ZIF 170mil