Shenzhen OROD technology support AT88S unlock and use various techniques to protect configuration data.
OTP–anti-fuse, flash-based reprogrammable memory cells, and reprogrammable, SRAM-based configurable logic cells.
Since configuration data is stored in The AT88SC0104C decrypts the chip, the chip has a mechanism to prevent stored data reading. The flash-based solution provides a relatively secure solution. Also, unless a highly complex method is used to disable the security mechanism, the possibility of data corruption is very high. low
AT88SC168 has strong security performance, fast read and write speed, and can be written without first erasing.
AT88SC1608 encryption card clock frequency is 1MHz; support page writes mode (16 bytes/page), if accessed by page write, access time is 10ms (maximum) / page; working voltage is 2.7V-5.5V; write/wipe The number of divisions is 100,000 times; the data is kept for 100 years; the operating temperature is 0-70 °C; the communication protocol complies with the ISO/IEC 7816-3 synchronization protocol.
In particular, the high-security performance of the AT88SC1608 encryption card is outstanding. The encryption logic also has high-security authentication and anti-intercept tracking technology, 64-bit mutual authentication, and authentication error counter, and the error count is eight times.
The AT88SC1608 has one 128-byte setting area and eight 256-byte application partitions. The eight areas can be freely combined and controlled by the read password and the password (16 sets of passwords, every 3 bytes), and the error count is eight times.
The principle of the most secure mode for product encryption using the encryption chip and its implementation process will be described below.
1) Chip authentication: By reading the serial number in the chip configuration area, the manufacturer ID, and the encrypted storage area, the data is obtained for 64-bit critical calculation (self-made F1 algorithm) and the encrypted seed Gc inside the chip is obtained. Then get the random number Ci of the specific register inside the chip and the lucky number Q1 generated by the CPU. Using the F2 algorithm inside the chip, the chip and the CPU respectively perform F2 (Ci, Q1, Gc) operations and use the calculation result to perform two-way judgment, thereby completing Certification
2) Encryption authentication of the chip: After the chip authentication is completed, the SK (the intermediate product of the specific part of the F2 algorithm) is generated by the first step operation, and the random number Q2 caused by the authentication update Ci+1 and the CPU is further encrypted. The operation F2 (Ci+1, Q2, SK) is authenticated, and finally, the Ci+2 updated by the internal chip is read and compared with the result calculated by the CPU. If they are the same, the encryption authentication is completed, and the encryption mode is entered.
3) Accessing the encrypted storage area in the encryption mode: In the encryption mode, the data transmitted on the I2C bus is the encrypted ciphertext data, first encrypting the password of the storage area, sending it to the chip for authentication; and then using the encrypted read command Encrypted access to the encrypted storage area with the password, the obtained data is decrypted, and compared with the data of the specific storage space inside the product, if the same, the data inside the chip and the data of the FLASH are updated. If the above operations are successful, the processing of the encrypted authentication task is completed.